SAMSUNG BN44-00329A
UCC28061 PFC DRIVER
DESCRIPTION
Optimized for consumer
applications concerned with audible noise elimination, this solution extends
the advantages of transition mode-high efficiency with low-cost components-to
higher power ratings than previously possible. By utilizing a Natural
Interleaving technique, both channels operate as masters (that is, there
is no slave channel) synchronized to the same frequency. This approach delivers
inherently strong matching, faster responses, and ensures that each channel
operates in transition mode. Complete system-level protections feature input
brownout, output over-voltage, open-loop, overload, soft-start, phase-fail
detection, and thermal shutdown. The additional FailSafe over-voltage
protection (OVP) feature protects against shorts to an intermediate voltage
that, if undetected, could lead to catastrophic device failure
APPLICATIONS
• 100-W to 800-W Power
Supplies
• Gaming
• D to A Set Top Boxes
• Adapters
• LCD, Plasma and DLP TVs
• Home Audio Systems
Pin configuration
6 Analog ground: Connect
analog signal bypass capacitors, compensation components, and analog signal
returns to this pin. Connect the analog and power grounds at a single point to
isolate high-current noise signals of the power components from interference
with the low-current analog circuits.
5 Error amplifier output: The
error amplifier is a transconductance amplifier, so this output is a
high-impedance current source. Connect voltage regulation loop compensation
components from this pin to AGND. The on-time seen at the gate drive outputs is
proportional to the voltage at this pin minus an offset of approximately 125
mV. During soft-start events (undervoltage, brownout, disable or output over
voltage), COMP is pulled low. Normal operation only resumes after the
soft-start event clears and COMP has been discharged below 0.5 V, making sure
that the circuit restarts with a low COMP voltage and a short on-time. Do not
connect COMP to a low-impedance source that would interfere with COMP falling
below 0.5 V.
10 Current sense input: Connect
the current sense resistor and the negative terminal of the diode bridge to
this pin. Connect the return of the current sense resistor to the AGND pin with
a separate trace. As input current increases, the voltage on CS goes more
negative. This cycle-by-cycle over-current protection limits input current by
turning off both gate driver (GDx) outputs when CS is more negative than the CS
rising threshold (approximately –200 mV). The GD outputs remain low until CS
falls to the CS falling threshold (approximately –15 mV). Current sense is
blanked for approximately 100 ns following the falling edge of either GD
output. This blanking filters noise that occurs when current switches from a
power FET to a boost diode. In most cases, no additional current sense
filtering is required. If filtering is required, the filter series resistance
must be under 100Ω to maintain accuracy. To prevent excessive negative voltage
on the CS pin during inrush conditions, connect the current sensing resistor to
the CS pin through a low value external resistor.
14,11 Channel A and channel B
gate drive output: Connect these pins to the gate of the power FET for each
phase through the shortest connection practical. If it is necessary to use a
trace longer than 0.5 inch (12.6 mm) for this connection, some ringing may
occur due to trace series inductance. This ringing can be reduced by adding a
5-Ω to 10-Ω resistor in series with GDA and GDB.
8 High voltage output sense: The
UCC28061 incorporates FailSafe OVP so that any single failure does not allow
the output to boost above safe levels. Output over-voltage is monitored by both
VSENSE and HVSEN and shuts down the PWM if either pin exceeds the appropriate
over-voltage threshold. Using two pins to monitor for over-voltage provides
redundant protection and fault tolerance. HVSEN can also be used to enable a
downstream power converter when the voltage on HVSEN is within the operating
region. Select the HVSEN divider ratio for the desired over-voltage and
power-good thresholds. Select the HVSEN divider impedance for the desired
power-good hysteresis. During operation, HVSEN must never fall below 0.8 V.
Dropping HVSEN below 0.8 V puts the UCC28061 into a special test mode, used
only for factory testing. A bypass capacitor from HVSEN to AGND is recommended
to filter noise and prevent false over-voltage shutdown.
13 Power ground for the
integrated circuit: Connect this pin to AGND through a separate short trace
to isolate gate driver noise from analog signals.
4 Phase B enable: This pin
turns on/off channel B of the boost converter. The commanded on-time for
channel A is immediately doubled when channel B is disabled, which helps to
keep COMP voltage constant during the phase management transient. The PHB pin
allows the user to add external phase management circuitry if they desire. To
disable phase management, connect the PHB pin to the VREF pin.
UCC25600 SMPS DRIVER
Description
The UCC25600 high performance, resonant mode controller is designed for dc-to-dc applications using resonant topologies, especially the LLC half-bridge resonant converter. This highly integrated controller implements frequency modulation control and complete system functions in only an 8-pin package. Switching to the UCC25600 will greatly simplify the system design and layout, and improve time to market, all at a price point lower than competitive 16- pin device offerings. The internal oscillator supports the switching frequencies from 40 kHz to 350 kHz. This high- accuracy oscillator realizes the minimum switching frequency limiting with 4% tolerance, allowing the designer to avoid over-design of the power stage and, thus, further reducing overall system cost. The programmable dead time enables zero-voltage switching with minimum magnetizing current. This maximizes system efficiency across a variety of applications. The programmable soft-start timer maximizes design flexibility demanded by the varied requirements of end equipment using a half-bridge topology. By incorporating a 0.4-A source and 0.8-A sink driving capability, a low cost, reliable gate driver transformer is a real option. The UCC25600 delivers complete system protection functions including overcurrent, UVLO, bias supply OVP, and overtemperature protection.
The UCC25600 high performance, resonant mode controller is designed for dc-to-dc applications using resonant topologies, especially the LLC half-bridge resonant converter. This highly integrated controller implements frequency modulation control and complete system functions in only an 8-pin package. Switching to the UCC25600 will greatly simplify the system design and layout, and improve time to market, all at a price point lower than competitive 16- pin device offerings. The internal oscillator supports the switching frequencies from 40 kHz to 350 kHz. This high- accuracy oscillator realizes the minimum switching frequency limiting with 4% tolerance, allowing the designer to avoid over-design of the power stage and, thus, further reducing overall system cost. The programmable dead time enables zero-voltage switching with minimum magnetizing current. This maximizes system efficiency across a variety of applications. The programmable soft-start timer maximizes design flexibility demanded by the varied requirements of end equipment using a half-bridge topology. By incorporating a 0.4-A source and 0.8-A sink driving capability, a low cost, reliable gate driver transformer is a real option. The UCC25600 delivers complete system protection functions including overcurrent, UVLO, bias supply OVP, and overtemperature protection.
PIN CONFIGARATION
1 This pin sets the dead time of
high-side and low-side switch driving signals. Connect a resistor to ground.
With internal 2.25-V voltage reference, the current flowing through the
resistor sets the dead time. To prevent shoot through when this pin is accidentally
shorted to ground, the minimum dead time is set to 120 ns. Any dead time
setting less than 120 ns will automatically have 120-ns dead time.
8,5 High-side and low-side switch
gate driver. Connect gate driver transformer primary side to these two pins to
drive the half-bridge.
6 Ground
3 Overcurrent protection pin.
When the voltage on this pin is above 1 V, gate driver signals are actively
pulled low. After the voltage falls below 0.6 V, the gate driver signal
recovers with soft start. When OC pin voltage is above 2 V, the device is
latched off. Bringing VCC below the UVLO level resets the overcurrent latch to
off.
2 The current flowing out of
this pin sets the frequency of the gate driver signals. Connect the opto coupler
collector to this pin to control the switching frequency for regulation
purposes. Parallel a resistor to ground to set the minimum current flowing out
of the pin and set the minimum switching frequency. To set the maximum
switching frequency limiting, simply series a resistor with the opto-coupler
transistor. This resistor sets the maximum current flowing out of the pin and limits
the maximum switching frequency.
4 Soft-start pin. This pin sets
the soft-start time of the system. Connect a capacitor to ground. Pulling this
pin below 1 V will disable the device to allow easy ON/OFF control. The
soft-start function is enabled after all fault conditions, including bias
supply OV, UVLO, overcurrent protection, and overtemperature protection.
7 Bias Supply. Connect this pin
to a power supply less than 20 V. Parallel a 1-μF capacitor to ground to filter
out noise.
ICE3BR2565JF
Description
The CoolSETF3R FullPak is the enhanced version of CoolSETF3 and targets for the Off-Line Adapters and high power range SMPS in DVD R/W, DVD Combi, set top box, etc. It has a wide Vcc range to 25V by adopting the BiCMOS technology. With the merit of Active Burst Mode, it can achieve the lowest Standby Power Requirements (<100mW) at no load and Vin = 270VAC. Since the controller is always active during the Active Burst Mode, it is an immediate response on load jumps and leads to <1% voltage ripple voltage at output. In case of protection for Overtemperature, Overvoltage, Open loop and Overload conditions, it would enter Auto Restart Mode. Thanks for the internal precise peak current limitation, it can provide accurate information to optimize the dimension of the transformer and the output diode. The built-in blanking window can provide sufficient buffer time before entering the Auto Restart Mode. In case of longer blanking time, a simply addition of capacitor to BA pin can serve the purpose. Furthermore, the built-in frequency jitter function can effectively reduce the EMI noise and further reduce the scale of input filter. The component counts can further be reduced with the various built-in functions such as soft start, blanking time and frequency jitter.
The CoolSETF3R FullPak is the enhanced version of CoolSETF3 and targets for the Off-Line Adapters and high power range SMPS in DVD R/W, DVD Combi, set top box, etc. It has a wide Vcc range to 25V by adopting the BiCMOS technology. With the merit of Active Burst Mode, it can achieve the lowest Standby Power Requirements (<100mW) at no load and Vin = 270VAC. Since the controller is always active during the Active Burst Mode, it is an immediate response on load jumps and leads to <1% voltage ripple voltage at output. In case of protection for Overtemperature, Overvoltage, Open loop and Overload conditions, it would enter Auto Restart Mode. Thanks for the internal precise peak current limitation, it can provide accurate information to optimize the dimension of the transformer and the output diode. The built-in blanking window can provide sufficient buffer time before entering the Auto Restart Mode. In case of longer blanking time, a simply addition of capacitor to BA pin can serve the purpose. Furthermore, the built-in frequency jitter function can effectively reduce the EMI noise and further reduce the scale of input filter. The component counts can further be reduced with the various built-in functions such as soft start, blanking time and frequency jitter.
Pin Functionality
1 Drain (Drain of integrated CoolMOS)
Pin Drain is the connection to the Drain of the internal CoolMOS and the HV of the startup cell.
1 Drain (Drain of integrated CoolMOS)
Pin Drain is the connection to the Drain of the internal CoolMOS and the HV of the startup cell.
2 CS (Current Sense)
The Current Sense pin senses the voltage developed on the series resistor inserted in the source of the integrated CoolMOS. If CS voltage reaches the internal threshold of the Current Limit Comparator, the Driver output is immediately switched off. Furthermore the current information is provided for the PWMComparator to realize the Current Mode.
The Current Sense pin senses the voltage developed on the series resistor inserted in the source of the integrated CoolMOS. If CS voltage reaches the internal threshold of the Current Limit Comparator, the Driver output is immediately switched off. Furthermore the current information is provided for the PWMComparator to realize the Current Mode.
3 BA (extended Blanking &
Auto-restart enable) The BA pin combines the functions of extendable blanking
time for over load protection and the external auto-restart enable. The
extendable blanking time function is to extend the built-in 20 ms blanking time
by adding an external capacitor at BA to ground. The external auto-restart
enable function is an external access to stop the gate switching and force the
IC to enter auto-restart mode. It is triggered by pulling down the BA pin to
less than 0.33V.
4 VCC (Power Supply) The
VCC pin is the positive supply of the IC. The operating range is between 10.5V
and 25V.
5 GND (Ground) The GND pin
is the ground of the controller.
6 FB (Feedback)
The information about the regulation is provided by the FB Pin to the internal Protection Unit and to the internal PWM-Comparator to control the duty cycle. The FBSignal is the only control signal in case of light load at the Active Burst Mode.
The information about the regulation is provided by the FB Pin to the internal Protection Unit and to the internal PWM-Comparator to control the duty cycle. The FBSignal is the only control signal in case of light load at the Active Burst Mode.
POWER SUPPLY CIRCUIT
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